Low-Voltage LDO Regulator Based on Native MOS Transistor with Improved PSR and Fast Response

In this paper, a low-voltage low-dropout analog regulator (ALDO) based on native n-channel MOS transistor is proposed. Application of the with threshold voltage close to zero allows elimination charge pump in regulators using pass element common drain configuration. Such configuration simplification design and improved performance, supply voltages below 1 V, compared commonly used p-channel transistors. presented ALDO 180 nm CMOS X-FAB technology, an output 0.7 V was achieved current 10 mA 0.8 V. Simulation results show that despite low voltage, spikes do not exceed 70 mV at worst technology corner when transients from 100 µA mA. Under such conditions, stable operation power rejection PSR = 35 dB were capacitance 0–500 pF. The proposed push limit applications only slight degradation its performance.